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Description

In certain Arm CPUs, a CPP RCTX instruction executed on one Processing Element (PE) may inhibit TLB invalidation when a TLBI is issued to the PE, either by the same PE or another PE in the shareability domain. In this case, the PE may retain stale TLB entries which should have been invalidated by the TLBI.

PUBLISHED Reserved 2025-01-22 | Published 2026-01-14 | Updated 2026-01-20 | Assigner Arm

Problem types

CWE-226 Sensitive Information in Resource Not Removed Before Reuse

Product status

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unaffected

Any version
affected

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unaffected

Any version
affected

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unaffected

Any version
affected

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unaffected

Any version
affected

Default status
unaffected

Any version
affected

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unaffected

Any version
affected

Default status
unaffected

Any version
affected

Default status
unaffected

Any version
affected

Default status
unaffected

Any version
affected

Default status
unaffected

Any version
affected

Default status
unaffected

Any version
affected

References

graph.volerion.com/view?ID=CVE-2025-0647 third-party-advisory

developer.arm.com/documentation/111546

cve.org (CVE-2025-0647)

nvd.nist.gov (CVE-2025-0647)

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